Verilog / VHDL Jobs
Verilog and VHDL are two of the most popular hardware description languages (HDLs) commonly used in the design, synthesis, analysis and verification of digital circuits. A Verilog or VHDL designer specializes in writing code in either of these languages for any integrated circuit applications needed.
Verilog and VHDL are used to describe digital systems ranging from relatively simple logic gates to incredibly complex designs involving multiple integration layers. If you need a new integrated circuit design or want to improve an existing one, hiring a Verilog / VHDL Designer is a great way to get the project done.
Here’s some projects that our expert Verilog / VHDL designer made real:
- Audio processing for microcontroller environments
- Design and implementation of digital signal processing pipelines
- Gate level models for facial recognition
- Digital signature schemes through Vivado Design Suite
- First-In-First-Out (FIFO) buffers for data storage
- Graph convolutional neural networks modules
- Audio codec music players through FPGA boards
- Stimulators for stack based microprocessors
As you can see, our team of freelancers have the capability to build any complex integrated circuits. They can develop sophisticated digital systems that make your dreams a reality. From audio processing through microcontrollers, to facial recognition gate level models, our team is able to deliver it all.
So if you’re looking for the perfect Verilog / VHDL Designer, just post your project on Freelancer.com and get to work on your dream project today! With our top rated Freelancers, you can be sure that your job is taken care of quickly and exactly how you want it – having some real experts handle your projects!From 11,404 reviews, clients rate our Verilog / VHDL Designers 4.83 out of 5 stars.
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Job Description: I need help designing a QAM RF simulation system in Matlab. The type of simulation I require is Single-User SISO for the output, and it should involve a fading channel for the input. Essentially, I want the output signal fed through a Rayleigh channel+SNR, then BER/demodulation/decoding of the signal should occur. My goal is to determine the transmission efficiency of the signal under different conditions. I am looking for someone who has experience and expertise in RF systems and software development. Familiarity with QAM and BER techniques, channel coding and modulation techniques and Matlab are all essential to this project. Accuracy and speed of delivery are paramount and skills such as algorithm optimization and multicore/multithreaded programming are desired.
printer coding vhdl coding zynq 7020
Embedded Linux with FPGA capability. From VHDL to application level programming.
Run Python code in Modelsim and run tests
See ALL Comments. For 10 years, poor FPGA BTC mining implementations, with excessively slow, power hungry designs. Researchers presented dozens of papers on how to make this better. This is your chance to get it right. Read this paper , then and look at their Verilog here to get a good understanding about state of the art FPGA BTC mining with verilog. Then apply that to YOUR FORK of the old standard in with an updated proxy for getwork. Clues follow to make FPGA BTC mining faster, smaller, and lower power, so that you will have REAL bragging rights for the fastest, smallest, lowest power FGPA miners. 1) The SHA256 compression is seeded with 256 bits of very random constants and forms a large shift register as the seed text and W[n] expansion pass results are mixed in during the next ...