VHDL: FIR Filter Design

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10 freelancers are bidding on average $69 for this job

ahmedmohamed85

Dear sir I have more than 9 years experience in digital design using vhdl , please check my profile also please message me so that we can discuss

$67 USD in 1 day
(251 Reviews)
7.5
ducdctoandh

I would like to bid this job because I am really suitable for job description: First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsub More

$100 USD in 2 days
(39 Reviews)
5.2
bchandra1955

Professional engineer with DSP experience ................................................................................................

$50 USD in 5 days
(38 Reviews)
5.5
SqUa11

Hello, My name is Mohamed. I have 5 years experience in VHDL and FIR filter design. I checked your project description and the word file. I can handle it and deliver it. Contact me for more details. Regards

$60 USD in 3 days
(47 Reviews)
4.7
rohi1710rohi1710

Hi, -FPGA design engineer since last 7 years -Expertise in verilog/VHDL Please find below details of the projects TSMAC Hardware acceleration(3months) The project is to develop hardware acceleration block for TS More

$66 USD in 3 days
(4 Reviews)
3.8
$50 USD in 2 days
(4 Reviews)
3.4
$194 USD in 1 day
(4 Reviews)
3.5
saminatinny

A proposal has not yet been provided

$166 USD in 5 days
(4 Reviews)
3.8
humanitista

I can build this FIR filter but I am most used with Xilinx ISE instead of Quartus, but I can build this on Quartus too. I can create the testbench files, plot the results in Matlab, etc. I just need to understand what More

$55 USD in 5 days
(2 Reviews)
2.1
praveenmaddirala

A proposal has not yet been provided

$25 USD in 1 day
(0 Reviews)
0.0
dangluonghoangvu

hi you. i think i can fit this project. i have two years exp in fpga design. so, it's ok with me. please contact me if you need more information for proposion

$55 USD in 7 days
(0 Reviews)
0.0