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coding in Verilog using Xilinx

$10-30 USD

Closed
Posted over 5 years ago

$10-30 USD

Paid on delivery
Please refer the attached document. This is the base paper of my project. I want to do my project on 64 bit square root carry select adder. I request you to help me with the coding in Verilog using Xilinx in gate level or switch level modelling. Can you please share the cost and the time line for the code. I will need it as soon as possible.
Project ID: 17855704

About the project

11 proposals
Remote project
Active 5 yrs ago

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11 freelancers are bidding on average $45 USD for this job
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Dear customer, I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG. I am really suitable for job description: First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done so many project of VHDL/Verilog(Karatsuba multiplier, Nintendo design, encryption algorithm like Sax Hash, Bernstein Hash, HummingBird...Also, I participated in a Walker Recognition project(data from Camera to Human Detection(image processing-HOG feature and Adaboost) and display in VGA). Besides,,I implemented the image conpression (wavelet transform). Aslo, I have experience in coding Booth multiplier and very familiar with Xilinx tools like ISE. and Vivado. Therefore, I can simulation the projecthe in behavior, post-syntheize... with free hesitation. I am also have experience of freelancer here: https://www.freelancer.com/u/ducdctoandh.html Also, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers and write the academic report. Please contact me and let me know if you want any special requirement and do with lower price. Thank you
$166 USD in 5 days
4.9 (90 reviews)
6.9
6.9
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I have 10 years of experiences in design and verifying using Verilog/SystemVerilog HDL. I am using vivado on a xilinx board Virtex7, please choose me. Best Regards
$40 USD in 1 day
5.0 (8 reviews)
4.2
4.2
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I have well experienced in doing such kind of jobs..................................and i will do my level best,.....................
$40 USD in 5 days
5.0 (3 reviews)
2.6
2.6
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I have done computer engineering. I have studied a course Digital System Design which was all about fpga. I have done this project during this course. I did it in Xilinx Spartan 6. Hope to hear from you.
$34 USD in 2 days
0.0 (0 reviews)
0.0
0.0
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VLSI Engineer here with working knowledge of Verilog and I assure you that the project would be done and delivered in a day. I have written many codes for Adder architectures. Award me the bid and be ensured about the results.
$25 USD in 1 day
0.0 (0 reviews)
0.0
0.0
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IF you like, we can start the Coding today and will complete it by today. having experienced with aorund 10 years of experience in VLSI design. Currently working in Qualcomm
$25 USD in 1 day
0.0 (0 reviews)
0.0
0.0
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Hello, My name is Anitha and I have about 12 years of experience designing and implementing systems on FPGAs and SoCs. I write my code in Verilog and VHDL. I'm new on Freelancer and this is my first bid. Good luck to both of us. Take care, Anitha P
$45 USD in 2 days
0.0 (0 reviews)
0.0
0.0
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I have done Mtech in VLSI design and my thesis was on FPGA implementation of binary integer decimal based floating point multiplier using verilog. So I can do your project easily. please give me one chance
$35 USD in 7 days
0.0 (0 reviews)
0.0
0.0

About the client

Flag of INDIA
Hyderabad, India
4.8
4
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Member since Jun 4, 2004

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