Shrikul J.

Hello Folks, With over 7 years of experience in designing FPGA based SoCs as well as ASIC tapeouts, I can help you out with Verilog/VHDL implementation, architecture analysis & FPGA based validation or bringup. I have worked both in one of the world's biggest and well know research institutes, Fraunhofer Institute for integrated Circuits, German Aerospace Centre as well for commercial organization like Samsung. You can contact me for the services mentioned below(but not limited to): - RTL implementation in Verilog/VHDL/SystemVerilog - FPGA based implementation for SoCs - FPGA prototyping for ASICs - HW accelerators for DSP, image processing or any other application - HW/SW Codesign - MATLAB based prototyping or algorithm implementation Skill set: - FPGAs: Xilinx, Altera, Microsemi - Languages: Verilog, VHDL, SystemVerilog, Perl, TCL, Python - Protocols: AXI, AHB, I2C, SPI, PCIe, SAS -Tools: Xilinx Vivado, Altera Quartus, Synopsys DC