Evaluate embedded operating system

Hi, I'm opeoluwa a solid independent specialist, I am so eager to function as a consultant, I am a diligent employee, inspired by meeting set focuses inside due dates, as it gives me a feeling of achievement. I focus on points of interest and guarantee Hi, Am a solid independent specialist, I am so eager to function as a consultant, I am a diligent employee, inspired by meeting set focuses inside due dates, as it gives me a feeling of achievement. I focus on points of interest and guarantee that my work will fulfill your desires. I likewise begin taking lessons to turned into a Experienced FPGA/Verilog/VHDL Engineer hand, to build up my aptitudes around there. I can state I am a genuine all-around collaborator with the capacity to deal with all parts of business while expanding general profitability with effective work. likewise i'm exceptionally capable in both talked and composed English and French dialect. I am entirely adaptable regarding working hours. Due dates are sacrosanct for me and I will audit my work the same number of times as it takes for it to surpass your desires. I am accessible 24 hours per day, 7 days seven days, I am enthusiastic and anticipate work with you! Best respectsthat my work will fulfill your desires. I likewise begin taking lessons to turned into a virtual right hand, to build up my aptitudes around there. I can state I am a genuine all-around collaborator with the capacity to deal with all parts of business while expanding ge

I am Hardware Design Engineer has done MSC system on Chip, University Southampton, UK. I have more than 8 years experience in digital design and well acquainted with ModelSim, Quartus, ISE, NCverilog, Vivado 2013.4, EDK embedded tools & worked on Virext-7, Virtex-6 ML605, Virtex-5 LX110T, Virtex-4 ML401, Spartan6, Spartan 3E, SOC Znyq Zedboard and MicroZed boards. This is a very interesting project and I have virtex-7 FPGA board at home. So I can test the project. Further, we can discuss it and I look forward to receiving your response. Regards Mahar

Hi, I hope you are doing well and enjoying digital design. I believe implementing a design right form modeling until verifying it on an FPGA is always a very special experience. Throughout my 3+ years of experience in the field, I had the joy of designing and implementing a part of LTE's physical layer right from the Matlab model, through RTL coding, simulations, and back-end stages. I also built many other designs such as a MIPS processor design, Can satellite, and a UART transmitter and receiver. All my designs were verified successfully on either Xilinx's Spartan S6, S3, or Altera's Cyclone V FPGA. (You can refer to my portfolio) The project sounds really challenging which makes it much more appealing. I would love to hear your thoughts and requirements for the delivery as well. I wish you get the best out of this project. - Eslam

Hello, i have read the details provided..please contact me to discuss more on the project deadline and some other few things

I'm a hardware designer in Silicon Valley, California USA. Specializing in developing hardware using VHDL and verilog for security firewall features in ASICs. Expect in writing synthesizable hardware for both ASIC and FPGA targets. Also, well versed in hardware debugging, closing timing for ASICs and also back end layout work. On the other hand, familiar with tools for vendors like Synopsys, debugging tools and Lint and timing closure tools. Chips used include the Xilinx Vertex, Microblaze, Altera Spartan 6 etc. I have also programming experience in C/C++ and have written low level firmware code for many device drivers to be used in a diagnostic environment. Comfortable using compile tools and performing embedded code debugging. Therefore, i am well suited for your project and am a good communicator who delivers on time,