Verilog coding

₹600-1500 INR

Closed

Posted

about 6 years ago

₹600-1500 INR

Paid on delivery

Verilog code of Simplified DES algorithm

Computer Security

Software Architecture

Verilog / VHDL

Project ID: 16776079

About the project

9 proposals

Remote project

Active 6 yrs ago

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9 freelancers are bidding on average ₹1,617 INR for this job

@kulwantsingh16

A proposal has not yet been provided

₹1,500 INR in 3 days

4.6

(14 reviews)

4.2

@hungfreelancer

I have 10 years of experience in design and verification using Verilog. Please message me. Best regards.

₹950 INR in 1 day

5.0

(3 reviews)

2.0

@HiLifeInfotech

Hi, Please PM for further discussion. Thanks

₹1,000 INR in 10 days

5.0

(2 reviews)

1.6

@shrikulj

Hi there I have a professional experience of about 6 years and about 4 years of academic experience working with FPGAs and Verilog/VHDL. Simplified DES is quite easy to code for me. I can quickly code the module and deliver with no errors. Please let me know if you are interested.

₹1,000 INR in 1 day

0.0

(0 reviews)

0.0

@chipdori

A proposal has not yet been provided

₹1,150 INR in 2 days

0.0

(0 reviews)

0.0

@umangangrish

A proposal has not yet been provided

₹800 INR in 1 day

0.0

(0 reviews)

0.0

@mounika7ms

I am pursuing my maters in Integrated Circuit Technology, and i have been working on VERILOG since last year. I have done a one year project on Digital Design of RADAR using VERILOG.

₹1,300 INR in 1 day